| Zavodchikova, et. al., report an alternative technique for the fabrication of CNT networks which provides several benefits, including the use of lower heat tolerant substrates, the elimination of potential contaminants from the CNT suspension medium, and the use of standard photolithography and liftoff processes enabling high precision patterning of CNTs for TFT channels. Initial results of their CNT network-based TFT devices demonstrate competitive performance. |
Reviewed by Jeff Morse, Ph.D., National Nanomanufacturing Network
The thin film transistor (TFT) has been developed over the past two decades for applications in large area devices, most notably displays. The predominant technology has been hydrogenated amorphous silicon. Recent developments in organic TFTs over the past decade offer low-cost alternatives when combined with large area printing and fabrication methods. Moreover, with a new emphasis on large area, flexible substrates for emerging applications--such as flexible displays and e-paper—low -temperature, low-cost, large-area processes are gaining significant momentum.
The performance of organic semiconductor electronics, however, is limited by low charge-carrier mobility. Furthermore, process stability for organic semiconductors remains at issue due to their insolubility and sensitivity to environmental conditions. Recently, carbon nanotubes (CNTs) have been the focus of intense research as a material for TFT applications due to higher performance in comparison to organic TFTs. In this context, CNT networks can be formed using various fabrication techniques providing a statistical average of the properties of the CNTs comprising the network. Electronic devices using CNT networks, including field effect transistors, diodes, logic circuits, displays, and solar cells, have been fabricated with a range of techniques wherein CNTs are integrated from suspensions such as spray, dip-coat, airbrush, or electrophoretic deposition.
While direct growth of CNTs on substrates can be tailored to provide aligned arrays at high packing density, the growth temperature of the chemical vapor deposition process makes this method impractical for low temperature, flexible substrates. Processes depositing CNTs from solution typically involve multiple steps in order to achieve sufficient dispersion and prevent agglomerations from forming. So while these techniques have demonstrated that CNT networks can be reproducibly fabricated, they include multi-step, tedious methods requiring post-process steps that may impact the electrical performance of the CNT network, and thereby TFT performance.
Recently, Zavodchikova, et. al., reported an alternative technique for the fabrication of CNT networks utilizing the dry deposition of CNTs onto a substrate directly after an aerosol synthesis, thereby providing a single-step deposition instantaneously following CNT growth. The process provides several benefits, including the use of lower heat tolerant substrates, the elimination of potential contaminants from the CNT suspension medium, and the use of standard photolithography and liftoff processes enabling high precision patterning of CNTs for TFT channels.
The authors reported a novel approach to improve the efficiency of CNT deposition utilizing an electric field applied to the substrate to direct the CNT bundles from the aerosol synthesis reactor. This was possible due to the high fraction of spontaneously charged CNT bundles formed at the outlet of the aerosol (floating catalyst) synthesis reactor. Applying a constant voltage to the substrate, the authors demonstrated that the density of single walled CNTs (SWCNT) could be controlled through a combination of voltage level and time.
Bottom gate TFT devices were fabricated on high conductivity silicon substrates having a backside gate electrode. The SWCNT network was patterned using a liftoff technique after which TiAu source-drain electrodes were aligned to the SWCNTs and patterned. A similar top gate TFT device was fabricated on a Kapton substrate. In both instances, the SWCNT network adhesion was sufficient to withstand subsequent photolithography and liftoff processes. Electrical characterization of the TFT devices exhibited On/Off ratios in excess of 5 orders of magnitude for longer gate length devices, with extrapolated charge carrier mobilities estimated to be 4 cm^2/V-sec and 1 cm^2/V-sec for bottom gate and top gate devices respectively. The TFTs exhibited large hysteresis in the transfer characteristics when sweeping the voltage from negative to positive and back. This is attributed to charge trapping mechanisms, such water or oxygen molecules adsorbed from air onto the SWCNT surface or contaminants from post process steps. In this work, the authors investigated the use of alumina films using atomic layer deposition (ALD) as a means to provide a controlled passivation layer that conformally coats the SWCNT network. Results showed that films on the order of 32 nm effectively eliminated the hysteresis via a combination surface passivation and contaminant desorption during the ALD process at elevated temperature.
An effective approach has been reported for the deposition of SWCNT networks on flexible substrates at low temperature that is conducive to low cost, large area processing. Initial results of these TFT devices demonstrate competitive performance in comparison to other materials being developed for TFTs. Furthermore, the fabrication process is relatively simple. While performance improvements are anticipated through optimization of the process sequence and electrode interface to the CNT networks, the authors have already demonstrated a significant step in scaled nanomanufacturing for large area, low-cost application requirements.
Image reproduced with permission from Zavodchikova ML, Kulmala T, Nasibulin AG, Ermolov V, Franssila S, Grigoras K, Kauppinen EI. 2009. Carbon nanotube thin film transitors based on aerosol methods. Nanotechnology 20 (085201).
This work is licensed under a Creative Commons Attribution-NonCommercial-NoDerivs 3.0 Unported.
